[IA64] Avoid insertion of pte.ma=001 into VHPT
authorAlex Williamson <alex.williamson@hp.com>
Fri, 30 Mar 2007 16:27:15 +0000 (10:27 -0600)
committerAlex Williamson <alex.williamson@hp.com>
Fri, 30 Mar 2007 16:27:15 +0000 (10:27 -0600)
A TLB entry shouldn't be inserted into VHPT when its memory
attribute field is 001 "software reserved".

Without this patch, a TLB fault expected by a guest OS is missing.

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
xen/arch/ia64/vmx/vmx_process.c

index 4ee7d4e8053c07b0318d02d17c86bf7e857f24af..ee811ba777f2600fe64c24234f66e199513536e8 100644 (file)
@@ -437,6 +437,11 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* regs)
         if (!guest_vhpt_lookup(vhpt_adr, &pteval)) {
             /* VHPT successfully read.  */
             if (pteval & _PAGE_P) {
+                if ((pteval & _PAGE_MA_MASK) == _PAGE_MA_ST) {
+                    vcpu_set_isr(v, misr.val);
+                    itlb_fault(v, vadr);
+                    return IA64_FAULT;
+                }
                 vcpu_get_rr(v, vadr, &rr);
                 itir = rr & (RR_RID_MASK | RR_PS_MASK);
                 thash_purge_and_insert(v, pteval, itir, vadr, ISIDE_TLB);